1. Field of the Invention
The invention relates to a digital to analog converter (DAC).
2. Prior Art Discussion
Many known DACs use a capacitor as the switched element, and output a unit of charge which directly corresponds to the input signal. Consequently an N-level DAC has N input levels and N output levels, where there is a direct correspondence between each input level and an associated output level. In the single bit case, where N=2, the input levels are typically 1,−1 which correspond to a positive or negative unit charge being delivered to the output terminal of the DAC respectively. For such DACs the output noise is independent of the input/output level, i.e. each output level results in the same noise. Noise is represented as follows:
                                          I            eq            2                    =                      2            ⁢                                                  ⁢                          kTCfs              2                        ⁢                                          f                B                            /                              (                                                      f                    S                                    /                  2                                )                                                                                  =                      4            ⁢                                                  ⁢                          kTCf              S                        ⁢                          f              B                                                (                  or        ⁢                                  ⁢                  V          eq          2                    =              kT        /        C              )  where K is Boltzmann's constant, T is the absolute temperature, C is the capacitance which is being switched, fs is the modulator sampling frequency and fB is the bandwidth of interest.
Thus, where there is a small output level the noise can be proportionately large.
A tri-level DAC is described in U.S. Pat. No. 5,274,375, where N=3, there are three input levels 1,0,+1 and three associated output levels which have a direct relationship with a corresponding input level. Similar to the bi-level DAC described above, a positive or negative signal is delivered to the output terminal of the DAC, when the input is either 1 or −1. However, when a zero input signal is present a “do nothing” state is created whereby zero charge is delivered at the output terminal of the DAC, with zero added noise. Thus, because there is no noise introduced at each zero level overall noise is reduced. However, achievement of this requires provision of a “do nothing” instruction at the input.
Another DAC type exists in which there are two input levels and three output levels, such that only the average input signal is delivered to the output terminal in a given clock cycle. In this case, in the third level zero signal is delivered to the output terminal of the DAC when the input changes from one clock cycle to the next. However, noise is still delivered to the output, even in the presence of no output signal. This is achieved by the switched control block of the switched element. The references are: D. Senderowicz, G. Nicollini, S. Pernici, A. Nagari, P. Confalonieri, and C. Dallavalle, “Low-Voltage Double-Sampled Sigma Delta Converters” IEEE Journal of Solid State Circuits, vol. 32, no. 12, pp. 1907–1919, December 1997, and H. K. Yang and E. I. El-Masry, “Double Sampling Delta-Sigma Modulators”, Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on, vol. 43, no. 7, pp. 524–529, July 1996. This DAC (“bilinear DAC”) differs from the tri-level DAC in that the “zero level” or “do nothing state” is not directly accessible at the input of the DAC. The output state results from a non-static input signal, such that the average charge outputted is zero. The DAC continues to output noise, even when a zero signal is outputted.
U.S. Pat. No. 5,200,750 describes a Sigma Delta DAC which detects a zero input signal, and reduces the noise within the Sigma Delta modulator for this input level.
The invention is therefore directed towards reducing the output noise of a DAC.